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customer approval sheet company name model a104sn03 v1 customer approved title : name : approval for specifications only (spec. ver. ) approval for specifications and es sample (spec. ver. ) approval for specifications and cs sample (spec. ver. ) customer remark : auo pm : p/n : comment : www..net
all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. doc. version : 0.4 total pages : 33 date : 2009/02/04 product specification 10.4" color tft-lcd module model name a104sn03 v1 planned lifetime: from 2008/dec to 2010/dec phase-out control: from 2010/jul to 2010/dec eol schedule: 2010/dec < >prelimin ary specification < >final specification note: the content of this specification is subject to change. ? 2009 au optronics all rights reserved, do not copy.
version: 0.4 page: 1/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. record of revision version revise date page content 0.0 2008/10/29 all first draft 0.1 2008/11/12 24 update response time 29 update drawing 0.2 2009/01/07 4 update drawing 17 update register table 18 delete r1 setting 0.3 2009/1/16 4 update drawing 10 delete extra electrical dc characteristics 32 add application circuit 0.4 2009/02/04 8 delete extra note
version: 0.4 page: 2/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. contents a. general information ..................................... ................................................... .............................................3 b. outline dimension ...................................... ................................................... ..............................................4 1. tft-lcd module ......................................... ................................................... .......................................4 c. electrical specifications................................ ................................................... ...........................................6 1. tft lcd panel pin assignment.............................. ................................................... .................................6 2. backlight pin assignment .................................. ................................................... .......................................9 3. absolute maximum ratings.................................. ................................................... ....................................9 3. electrical dc characteristics......................... ................................................... .........................................10 4. electrical ac characteristics ......................... ................................................... .........................................13 5. serial interface characteristics ........................ ................................................... ......................................16 6. power on/off characteristics........................... ................................................... ......................................21 d. optical specification................................... ................................................... ............................................24 e. reliability test items................................... ................................................... ............................................27 f. packing and marking ...................................... ................................................... ........................................30 1. packing form .......................................... ................................................... ...............................................30 2. module/panel label information............................... ................................................... ..............................31 3. carton label information .................................. ................................................... ......................................31 g. application note..................................... ................................................... .................................................32 application circuit.................................... ................................................... ................................................... 32 h. precautions.......................................... ................................................... ................................................... .33
version: 0.4 page: 3/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. a. general information this product is for portable dvd and digital photo frame application. no. item unit specification remark 1 screen size inch 10.4(diagonal) 2 display resolution dot 800rgb(w)x600(h) 3 overall dimension mm 228.4(w)x175.4(h)x6.2(d) note 1 4 active area mm 211.2(w)x158.4(h) 5 pixel pitch mm 0.264(w)x0.264(h) 6 color configuration -- r. g. b. stripe note 2 7 color depth -- 16.7m colors note 3 8 ntsc ratio % 50 9 display mode -- normally white 10 panel surface treatment -- anti-glare, 3h 11 weight g 40020 12 panel power consumption w 0.43 note 4 13 backlight power consumption w 2.97 14 viewing direction 6 oclock (gray inversion) note 1: not include blacklight cable and fpc. refer next page to get further information. note 2: below figure shows dot stripe arrangement. note 3: the full color display depends on 24-bit da ta signal (pin 4~27). note 4: please refer to electrical characteristics chapter. r g b r g b r g b r g b r g b . . ( 1 2 3. .. . .............2398 2399 2400 ) ( 1 ... ..600 )
version: 0.4 page: 4/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transforme d to any other forms without permission from au optronics corp. b. outline dimension 1. tft-lcd module
version: 0.4 page: 5/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transforme d to any other forms without permission from au optronics corp.
version: 0.4 page: 6/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. c. electrical specifications 1. tft lcd panel pin assignment recommended connector : hrs fh28-60s-0.5sh pin no symbol i/o description remark 1 agnd p ground for analog circuit 2 avdd p analog power supply voltage 3 vddio p digital interface supply voltage 4 r0 i red data input (lsb) 5 r1 i red data input 6 r2 i red data input 7 r3 i red data input 8 r4 i red data input 9 r5 i red data input 10 r6 i red data input 11 r7 i red data input (msb) 12 g0 i green data input (lsb) 13 g1 i green data input 14 g2 i green data input 15 g3 i green data input 16 g4 i green data input 17 g5 i green data input 18 g6 i green data input 19 g7 i green data input (msb) 20 b0 i blue data input (lsb) 21 b1 i blue data input 22 b2 i blue data input 23 b3 i blue data input 24 b4 i blue data input 25 b5 i blue data input 26 b6 i blue data input 27 b7 i blue data input (msb) 28 dclk i data clock input 29 de i data enable signal 30 hsync i horizontal sync input. (negative polarity) 31 vsync i vertical sync input. (negative polarity) 32 scl i serial communication clock input 33 sda i serial communication data input 34 csb i serial communication chip select
version: 0.4 page: 7/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 35 nc - for test, do not connect (please leave it open) 36 vddio p digital interface supply voltage 37 nc - for test, do not connect (please leave it open) 38 gnd p ground for digital circuit 39 agnd p ground for analog circuit 40 avdd p analog power supply voltage 41 vcomin i for external vcom dc input 42 dith i dithering setting dith = "l" 6bit resolution(lsb last 2 bi ts of input data turncated) dith = "h" 8bit resolution(default setting) 43 nc - for test, do not connect (please leave it open) 44 vcom o connect a capacitor 45 v10 i gamma correction voltage reference 46 v9 i gamma correction voltage reference 47 v8 i gamma correction voltage reference 48 v7 i gamma correction voltage reference 49 v6 i gamma correction voltage reference 50 v5 i gamma correction voltage reference 51 v4 i gamma correction voltage reference 52 v3 i gamma correction voltage reference 53 v2 i gamma correction voltage reference 54 v1 i gamma correction voltage reference 55 nc - for test, do not connect (please leave it open) 56 vgh p positive power for tft 57 vddio p digital interface supply voltage 58 vgl p negative power supply for gate driver. 59 gnd p ground for digital circuit 60 nc - for test, do not connect (please leave it open) i: input; p: power
version: 0.4 page: 8/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. .
version: 0.4 page: 9/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 2. backlight pin assignment recommended connector : join tek jt1025-1021 pin no symbol i/o description remark 1 vled+ p backlight led anode 2 vled- p backlight led cathode 3. absolute maximum ratings item symbol conditio min. max. unit remark vddio gnd=0 -0.5 5 v digital power supply avdd agnd=0 -0.5 15 v analog power supply vgh -0.3 42 v gate driver supply voltage vgl gnd=0 -20 0.3 v gate driver supply voltage power voltage vgh vgl - 40 v gate driver supply voltage v i -0.3 vddio+0.3 v note 1 input signal voltage vcomin 0 5 v vcom dc voltage operating topa -10 60 storage tstg -20 70 note 1: functional operation should be restricted u nder ambient temperature (25 ) . note 2: maximum ratings are those values beyond which damages to the device may occur. functional operation should be restricted to the li mits in the electrical characteristics chapter.
version: 0.4 page: 10/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 3. electrical dc characteristics a. typical operation condition (agnd =gnd = 0v) item symbol min. typ. max. unit remark vddio 3.0 3.3 3.6 v digital power supply avdd 10.5 11 11.5 v analog power supply vgh 14 15 16 v positive power supply for gate driver power voltage vgl -7.5 -7 -6.5 v negative power supply for gate driver h level vih 0.7xvddio -- vddio v input signal voltage l level vil gnd -- 0.3xvddio v v1 ~ v5 avdd/2 - avdd C 1 v note 1 gamma reference voltage v6 ~ v10 1 - avdd/2 v vcomin v cdc 3.75 3.95 4.15 v note 2 note 1: gamma suggested circuit is as follows
version: 0.4 page: 11/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. pin voltage(v) avdd 11 v1 10 v2 8.5 v3 8 v4 7.57 v5 6.7 v6 4.3 v7 3.43 v8 3 v9 2.5 v10 1 note2: based on recommended gamma 2.2 voltage.
version: 0.4 page: 12/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. b. current consumption (agnd=gnd=0v) parameter symbol condition min. typ. max. unit remark input current for vddio ivddio vddio = 3.3v 10 20 m a note 1, 2 input current for avdd iavdd avdd = 11v 24 30 ma note 1, 2 input current for vgh ivgh vgh = 15v -- 0.4 0.6 ma note 1, 2 input current for vgl ivgl vgl = -7v -0.6 -0.4 -- ma note 1, 2 note 1:test condition is under typical eletrical dc and ac characteristics. note 2: test pattern is the following picture. c. backlight driving conditions the backlight (led module, note 1) is suggested to drive by constant current with typical value. parameter symbol min. typ. max. unit remark led light bar current i l -- 300 -- ma power consumption p -- 3 3.21 w note 1 led life time l l 10,000 -- -- hr note 2, 3 note 1: the led driving condition is defined for le d module (36 led). the voltage range will be 8.8v to 10.7v based on suggested driving current set as 300ma. note 2: define led lifetime: brightness is decreased to 50% of the initial value. led lifetime is restricted under normal condition, ambient temperature = 25 and led lightbar current = 300ma. note 3: if it uses larger led lightbar current more than 300ma, it maybe decreases the led lifetime.
version: 0.4 page: 13/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 4. electrical ac characteristics a. signal ac characteristics parameter symbol min. typ. max. unit remark dclk duty cycle -- 40 50 60 % t cw / t dclk x100% vsync setup time t vst 0 -- -- ns vsync hold time t vhd 2 -- -- ns hsync setup time t hst 5 -- -- ns hsync hold time t hhd 10 -- -- ns data setup time t dst 5 -- -- ns data hold time t dhd 10 -- -- ns data enable set-up time t est 4 -- -- ns data enable hold time t ehd 2 -- -- ns t h : hsync period t dclk : dclk period t cw : the width of dclk high
version: 0.4 page: 14/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. b. input timing hs r[7:0] g[7:0] b[7:0] r0 g0 b0 r1 g1 b1 r2 g2 b2 r3 g3 b3 t h t hw t hb t hf t he r n-1 g n-1 b n-1 r n g n b n invalid invalid invalid invalid invalid invalid r n g n b n r n-1 g n-1 b n-1 t hbl t hd dclk horizontal input timing. (hv mode) dclk de t hbl t hd r[7:0] g[7:0] b[7:0] r0 g0 b0 r1 g1 b1 r2 g2 b2 r3 g3 b3 r n-1 g n-1 b n-1 r n g n b n invalid invalid invalid invalid invalid invalid r n g n b n r n-1 g n-1 b n-1 horizontal input timing. (de mode) horizontal timing parameter symbol min. typ. max. unit. remark dclk frequency f dclk 25 40 45 mhz dclk period t dclk 22 25 40 ns hsync period (= t hd + t hbl ) t h 1026 1056 1183 dclk active area t hd - 800 - dclk horizontal blanking (= t hf + t he ) t hbl 226 256 383 dclk hsync front porch t hf 10 40 167 dclk delay from hsync to 1 st data input (= t hw + t hb ) t he 216 dclk
version: 0.4 page: 15/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. hsync pulse width t hw 1 128 136 dclk hsync back porch t hb 80 88 215 dclk horizontal input timing (hv mode) horizontal input timing (de mode) vertical timing parameter symbol min. typ. max. unit. remark vsync period (= t vd + t vbl ) t v - 628 635 th active lines t vd - 600 - th vertical blanking (= t vf + t ve ) t vbl - 28 35 th vsync front porch t vf - 1 8 th gd start pulse delay t ve - 27 - th vsync pulse width t vw 1 3 16 th hsync/vsync phase shift t vpd 2 320 - dclk
version: 0.4 page: 16/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. vertical timing (hv mode) vertical timing (de mode) 5. serial interface characteristics a. serial control interface ac characteristic parameter symbol min. typ. max. unit. remark serial data setup time t ist 120 - - ns serial data hold time t ihd 120 - - ns csb setup time t cst 120 - - ns csb hold time t chd 120 - - ns serial clock high/low t ssw 120 - - ns serial clock t sck 320 - - ns delay from csb to vsync t cv 1 - - us chip select distinguish t cd 1 - - us serial data output delay t id - - 60 ns cl=20pf
version: 0.4 page: 17/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. b serial interface timing there is a total of 6 registers each containing several paramete rs. for a detailed description of the parameters refer to register table. the serial register has read/write function. d[ 15:12] are the register address, d[11] defines the read or write mode and d[10:0] are the data. serial interface write sequence 1. at power-on, the default values specified for each parameter are taken. 2. if less than 16-bit data are read during the cs low time period, the data is cancelled. a. the write operation is cancelled. 3. all items are set at the falling edge of the vertical sync, except r 0[1:0]. 4. when grb is activated through the serial interface, all registers ar e cleared, except the grb value. 5. the register setting values are valid when vcc already goes to high and after vsync starts. 6. it is suggested that vsync, hsync, dclk always exists in t he same time. but if hsync, dclk stops, only vsync operating, the register setting is still valid. 7. if the chip goes to standby mode, the register value will still keep. mcu can wake up the chip only by changing standby mode value from low to high. 8. the register setting values are rewritten by the influence of static electricity, a noise, etc. to u nsuitable value, incorrect operating may occur. it is suggested that the spi interface will setup as frequently as poss ible.
version: 0.4 page: 18/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. c. register table (default value) reg address r/w data no. d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 r0 0 0 0 0 0 (01) (01) (1) u/d (0) shl (1) (1) (0) grb (1) stb (1) r2 0 0 1 0 0 hdl (80h) r3 0 0 1 1 0 (0) (0) (0) (0) (0) vdl (1000) r4 0 1 0 0 0 (1) (0) (0) (0) (1) (1111) r6 0 1 1 0 0 (0) engb12 (1) engb11 (1) engb10 (1) (0) (0) engb5 (1) engb4 (1) engb3 (1) (0) x: reserved. please set to 0. sending serial commands periodically is recommended to improve esd protection abi lity. d. register description a. r0 setting address bit description default 0000 [10..0] bits 10-9 auo internal use 01 bits7-8 auo internal use 01 bit6 (dith) dithering function. 1 bit5 (u/d) vertical shift direction selection. 0 bit4 (shl) horizontal shift direction selection. 1 bit3 auo internal use. 1 bit2 auo internal use 0 bit1 (grb) global reset. 1 bit0 (stb) standby mode setting. 1 bit6 dith function 0 dith off. 1 dith on. (default) bit5 u/d function 0 scan down; first line= gn -> gn-1 -> -> g2 -> l ast line=g0. (default) 1 scan up; first line= g0 -> g2 -> -> gn-1 -> las t line=gn bit4 shl function 0 shift left; first data= y600 -> y599 -> -> y2 - > last data=y1. 1 shift right; first data= y1 -> y2 -> -> y599 -> last data=y600. (default)
version: 0.4 page: 19/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. bit1 grb function 0 the controller is reset. reset all registers to de fault value. 1 normal operation. (default) bit0 stb function 0 t-con, source driver and dc-dcs converters are off. all outputs are set to gnd. 1 normal operation. (default) b. r2 setting address bit description default 0010 [7..0] bit7-0(hdl) horizontal start pulse adjustment function 80h bit7-0 hdl function 00h t he = t hetyp - 128 clk period. 80h t he = t hetyp . (default) ffh t he = t hetyp + 127 clk period. c. r3 setting address bit description default 0011 [8..0] bit8 auo internal use 0 bit7 auo internal use 0 bit6 auo internal use 0 bit5 auo internal use 0 bit4 auo internal use 0 bit3-0(vdl) vertical start pulse adjustment function 1000 bit3-0 vdl function 0000 t ve = t vetyp C 8 hs period. 0001 t ve = t vetyp C 7 hs period. 0010 t ve = t vetyp C 6 hs period. 0011 t ve = t vetyp C 5 hs period. 0100 t ve = t vetyp C 4 hs period. 0101 t ve = t vetyp C 3 hs period. 0110 t ve = t vetyp C 2 hs period. 0111 t ve = t vetyp C 1 hs period. 1000 t ve = t vetyp. (default) 1001 t ve = t vetyp C 1 hs period. 1010 t ve = t vetyp C 2 hs period. 1011 t ve = t vetyp C 3 hs period. 1100 t ve = t vetyp C 4 hs period.
version: 0.4 page: 20/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 1101 t ve = t vetyp C 5 hs period. 1110 t ve = t vetyp C 6 hs period. 1111 t ve = t vetyp C 7 hs period. d. r6 setting address bit description default 0110 [9..0] bits9 auo internal use 0 bits8(engb12) gamma buffer enable for v9 1 bits7(engb11) gamma buffer enable for v8 1 bits6(engb10) gamma buffer enable for v7 1 bits5 auo internal use 0 bits4 auo internal use 0 bits3(engb5) gamma buffer enable for v4 1 bits2(engb4) gamma buffer enable for v3 1 bits1(engb3) gamma buffer enable for v2 1 bits0 auo internal use 0 bitx engbx function 0 gamma buffer for vx is disabled (high z). 1 gamma buffer is enabled. vx must be connected externally.
version: 0.4 page: 21/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 6. power on/off characteristics a. recommended power on register setting address r/w data reg no . d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 r0 0 0 0 0 0 10 01 1 0 1 0 0 1 1 r1 0 0 0 1 0 0 01 01 2fh r2 0 0 1 0 0 0 0 0 80h r3 0 0 1 1 0 0 0 0 0 0 0 0 1000 r4 0 1 0 0 0 0 0 1 1 00 1 1111 r6 0 1 1 0 0 0 0 1 1 1 0 0 1 1 1 0 note : start to provide spi commend at least after 2 frame. 1. send r15 : 000h(normal register bank) at first. 2. wait at least after more than one frame, send r0 : 4d1h(global reset) 3. after send global reset, start to send r0 to r6 recommend register va lue.
version: 0.4 page: 22/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transforme d to any other forms without permission from au optronics corp. b. recommended power on sequence
version: 0.4 page: 23/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transforme d to any other forms without permission from au optronics corp. c. power off sequence
version: 0.4 page: 24/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. d. optical specification all optical specification is measured under typical condition (note 1, 2) item symbol condition min. typ. max. unit remark response time rise fall tr tf =0 -- -- 30 7 33 ms ms note 3 contrast ratio cr at optimized viewing angle 300 500 -- note 4 top bottom left viewing angle right cr 10 R 40 50 65 65 50 60 75 75 -- -- -- -- deg. note 5 brightness y l =0 2 5 0 30 0 -- cd/m 2 note 6 x =0 0.28 0.33 0.38 white y =0 0.30 0.35 0.40 x =0 0.550 0.600 0.650 red y =0 0.324 0.374 0.424 x =0 0.306 0.356 0.406 green y =0 0.531 0.581 0.631 x =0 0.094 0.144 0.194 chromaticity blue y =0 0.043 0.093 0.143 uniformity y l % 75 80 -- note 7 note 1: ambient temperature =25 , and led lightbar current i l = 300ma. to be measured in the dark room. note 2: to be measured on the center area of panel with a viewing cone of 1 by topcon luminance meter bm-5a, after 15 minutes operation. center of the screen field=1 note 3: definition of response time: bm-5a
version: 0.4 page: 25/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. the output signals of photo detector are measured wh en the input signals are changed from black to white(falling time) and from white to black(rising time), respectively. the response time is defined as the time interval be tween the 10% and 90% of amplitudes. refer to figure as below. s i g n a l ( r e l a t i v e v a l u e ) "black" tr tf "white" "white" 0% 10% 90% 100% note 4.definition of contrast ratio: contrast ratio is calculated with the following fo rmula. status black" " at is lcd when output detector photo status white" " at is lcd when output detector photo (cr) ratio contrast = note 5. definition of viewing angle, , refer to fi gure as below. note 6. measured at the center area of the panel whe n all the input terminals of lcd panel are electrically opened. note 7: luminance uniformity of these 9 points is d efined as below:
version: 0.4 page: 26/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 9) - (1 points 9 in luminance maximum 9) - (1 points 9 in luminance minimum uniformity =
version: 0.4 page: 27/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. e. reliability test items no. test items conditions remark 1 high temperature storage ta= 70 240hrs 2 low temperature storage ta= -20 240hrs 3 high ttemperature operation tp= 60 240hrs 4 low temperature operation ta=-10 240hrs 5 high temperature & high humidity tp= 50 . 80% rh 240hrs operation 6 heat shock -10 ~60 / 100 cycles 1hrs/cycle non-operation 7 electrostatic discharge contact = 4 kv, class b air = 8 kv, class b note 5 8 image sticking 25 , 4hrs note 6 frequency range : 10~55hz stoke : 1.5mm sweep : 10 ~ 55 ~ 10hz 2 hours for each direction of x,y,z 9 vibration (6 hours for total) non-operation jis c7021, a-10 condition a : 15 minutes 10 mechanical shock 100g . 6ms, x,y,z 3 times for each direction non-operation jis c7021, a-7 condition c 11 vibration (with carton) random vibration: 0.015g 2 /hz from 5~200hz C6db/octave from 200~500hz iec 68-34 12 drop (with carton) height: 60cm 1 corner, 3 edges, 6 surfaces 13 pressure 5kg, 5sec note 7 note 1: ta: ambient temperature. tp: panel surface temp erature note 2: in the standard conditions, there is not di splay function ng issue occurred. all the cosmetic specification is judged before the reliability stre ss. note 3: all the cosmetic specification is judged be fore the reliability stress. note5 : all test techniques follow iec6100-4-2 stan dard.
version: 0.4 page: 28/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. test condition note pattern procedure and set-up contact discharge 330?, 150pf, 1sec, 8 point, 10times/point air discharge 330?, 150pf, 1sec, 8 point, 10times/point criteria b C some performance degradation allowed. no data lost. self-recoverable hardware failure. note 6: operate with chess board pattern as figure a nd lasting time and temperature as the conditions. then judge with 50% gray level, the mura is less th an jnd 2.5 note 7: the panel is tested as figure. the jig is10 mm made by cu with rubber and the loading speed is 3mm/min on position a~e. after the condition, no glass crack will be found and panel function check is ok.( no guarantee lc mura lc bubble)
version: 0.4 page: 29/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. loading lcm
version: 0.4 page: 30/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. f. packing and marking 1. packing form
version: 0.4 page: 31/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 2. module/panel label information the module/panel (collectively called as the product) will be attached wi th a label of shipping number which represents the identification of the product at a specific locatio n. refer to the product outline drawing for detailed location and size of the label. the label is composed of a 22-digit serial number and printed with code 39/128 with the following definition: example: 501m06zl06123456781z05: product manufacturing week code: wk50 product version: version 1 product manufactuing factory: m06 3. carton label information the packing carton will be attached with a carton label where packing qty, auo model name, auo part number, customer part number (optional) and a series of carton number in 13 or 14 digits are printed. the carton number is apparing in the following format: refer to the drawing of packing format for the location and size of the carton lab el.
version: 0.4 page: 32/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transforme d to any other forms without permission from au optronics corp. g. application note application circuit 3.3v /rdy 1 fb1 2 comp 3 in 4 gnd 5 ref 6 fb2 7 fb3 8 ct 16 sw 15 pgnd 14 in3 13 gh 12 in2 11 gl 10 en 9 u401 mp1530 c421 0.1uf/25v/x5r/0603 r415 no(0/5%/0603) r418 10k/1%/0603 r413 100k/5%/0603 r427 110k/1%/0603 fb_3 r419 0/5%/0603 r412 0/5%/0603 r426 10k/1%/0603 vgh r423 5.1k/1%/0603 c415 0.1uf/25v/x5r/0603 r433 261/5%/0603 fb_2 c418 10uf/10v/x5r/0805 1 2 d405 no(rb551v-30) c420 22nf/50v/x5r/0603 r430 0/5%/0603 en r422 0/5%/0603 c429 2.2uf/25v/x5r/0805 c426 1uf/35v/x5r/0603 fb_1 1 3 2 d404 sb07-03c k 2 a 1 c 3 dm407 dan217u r429 10/1%/0603 k 2 a 1 c 3 dm405 dan217u r425 78k/1%/0603 c413 0.1uf/25v/x5r/0603 r428 0k/1%/0603 c423 27pf/50v/x5r/0402 c428 27pf/50v/x5r/0603 r424 0/5%/0603 l402 cxlp100-100(10uh) cxlp100 c425 0.1uf/25v/x5r/0603 c416 2.2uf/35v/x5r/0805 r420 56k/1%/0603 3.3v c424 0.1uf/25v/x5r/0603 c422 2.2uf/35v/x5r/0805 r421 10/1%/0603 k 2 a 1 c 3 dm408 dan217u vgl r414 6.8k/5%/0603 c430 22uf/16v/x5r/1206 k 2 a 1 c 3 dm406 dan217u r432 0/5%/0603 c427 2.2uf/35v/x5r/0805 r431 5.1k/5%/0603 c417 0.1uf/10v/x5r/0402 r417 10k/1%/0603 c414 1uf/35v/x5r/0603 avdd c419 10nf/50v/x5r/0603 -7v +11v +15v
version: 0.4 page: 33/33 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. h. precautions 1. do not twist or bend the module and prevent the unsuitable external force for dis play module during assembly. 2. adopt measures for good heat radiation. be sure to use the module with in the speci fied temperature. 3. avoid dust or oil mist during assembly. 4. follow the correct power sequence while operating. do not apply the inval id signal, otherwise, it will cause improper shut down and damage the module. 5. less emi: it will be more safety and less noise. 6. please operate module in suitable temperature. the response time & brightness will dri ft by different temperature. 7. avoid to display the fixed pattern (exclude the white pattern) in a long peri od, otherwise, it will cause image sticking. 8. be sure to turn off the power when connecting or disconnecting the circuit . 9. polarizer scratches easily, please handle it carefully. 10. display surface never likes dirt or stains. 11. a dewdrop may lead to destruction. please wipe off any moisture before usi ng module. 12. sudden temperature changes cause condensation, and it will cause polarizer damaged. 13. high temperature and humidity may degrade performance. please do not expose the module to the direct sunlight and so on. 14. acetic acid or chlorine compounds are not friends with tft display module. 15. static electricity will damage the module, please do not touch the module wit hout any grounded device. 16. do not disassemble and reassemble the module by self. 17. be careful do not touch the rear side directly. 18. no strong vibration or shock. it will cause module broken. 19. storage the modules in suitable environment with regular packing. 20. be careful of injury from a broken display module. 21. please avoid the pressure adding to the surface (front or rear side) of modul es, because it will cause the display non-uniformity or other function issue. 22. please use sscg(spread spectrum clock generator) at system for emi reducti on.

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